The present invention relates to a reconfigurable semiconductor device.
In contrast to a field programmable gate array (FPGA) having a dedicated switch circuit in each memory cell unit, a “memory-based programmable logic device (MPLD)” (registered trademark) has a memory cell unit and can be manufactured by a standard complementary metal oxide semiconductor (CMOS) logic process, thereby allowing a price reduction. Since the MPLD is not a synchronous type, however, it may be impossible to satisfy its performance when it is used as a synchronous memory. Thus, the applicant has proposed a “memory based reconfigurable logic device (MRLD)” (registered trademark) that can be manufactured by a standard manufacturing process of a memory cell unit and can be used as a synchronous memory (see JP 2013-219699A).